LC890561W Datasheet, PDF (33/47 Pages) Sanyo Semicon Device – CMOS IC Digital Audio Interface Receiver with Built-in Data Buffer Memory

LC890561W
CE
CL
DI
B0 B1 B2 B3 A0 A1 A2 A3
DO
DO0 DO1 DO2 DO3 DO4 ^{…. ….} DOn
Figure 14.4 Output Timing Chart (Normal H Clock, DO includes a pull-up resister)
*Valid only when IMOD=1
**Output data can not be read when IMOD=0
14.3 0xE9 Data Output Timing
CE
DO
RENEWAL FLAG CONTROL MODE
CATEGORY
MODE CHAN. FS CLOCK 00 WORD 0000
8bit
8bit
8bit
8bit
CL
DO
flag ERR FSB0 FSB1 F0 F1 F2 0
Bit40 Bit41 Bit42 Bit43 Bit44 Bit45 Bit46 Bit47
Update flag ERROR
Internal fs calculation result
Figure 14.5 Output Timing of Flag + Channel Status Data
14.4 0xEA Data Output Timing
CE
Error flag
DO
Stream number Data type dependent info
Reserved
Data type
CL
DO
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Figure 14.6 Output Timing of Preamble Pc Data
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