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LC890561W Datasheet, PDF (35/47 Pages) Sanyo Semicon Device – CMOS IC Digital Audio Interface Receiver with Built-in Data Buffer Memory
14.5.2 Details of Write Commands
LC890561W
DI7
XADC
DI15
CKDV
DI6
XCNT
DI14
BMOD
DI5
SMOD
DI13
ERF1
CCB address: 0xE8
DI4
DI3
STOP
DOSW
DI12
DI11
ERF0
FSL1
DI2
0
DI10
FSL0
DI1
0
DI9
DIS1
DI0
0
DI8
DIS0
DOSW
STOP
SMOD
XCNT
XADC
Output data format setting
0 : Follow setting of DOSEL0 and DOSEL1 (default)
1 : 24bit I2S data output
System stop setting
0 : Don’t stop system (default)
1 : Stop system
Source setting
0 : Digital mode, digital data reception enabled (default)
1 : Analog mode, digital data reception disabled
XIN, XOUT oscillation amplifier operation setting
0 : PLL is stopped when locked (default)
1 : PLL always operates, regardless of locked/unlocked
XMCK output clock setting
0 : Output XIN clock (default)
1 : Output 1/2 of XIN clock
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