K4J55323QG Datasheet, PDF (50/53 Pages) Samsung semiconductor – 256Mbit GDDR3 SDRAM

K4J55323QG
256M GDDR3 SDRAM
10.4 DC CHARACTERISTICS
Parameter
Symbol
Test Condition
Operating Current
(One Bank Active)
Precharge Standby Current
in Power-down mode
Precharge Standby Current
in Non Power-down mode
Active Standby Current
power-down mode
Active Standby Current in
in Non Power-down mode
Operating Current
( Burst Mode)
Refresh Current
Self Refresh Current
Operating Current
(4Bank interleaving)
ICC1
Burst Length=4 tRC ≥ tRC(min)
IOL=0mA, tCC= tCC(min)
ICC2P CKE ≤ VIL(max), tCC= tCC(min)
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min),
tCC= tCC(min)
ICC3P CKE ≤ VIL(max), tCC= tCC(min)
ICC3N
ICC4
ICC5
ICC6
ICC7
CKE ≥ VIH(min), CS ≥ VIH(min),
tCC= tCC(min)
IOL=0mA ,tCC= tCC(min),
Page Burst, All Banks activated.
tRC≥ tRFC
CKE ≤ 0.2V
Burst Length=4 tRC ≥ tRC(min)
IOL=0mA, tCC= tCC(min)
Note :
1. Measured with outputs open and ODT off
2. Refresh period is 32ms
(0°C ≤ Tc ≤85°C ; VDD=1.8V + 0.1V, VDDQ=1.8V + 0.1V)
Version
Unit
-12
-14
-16
-20
440
420
410
400
mA
100
90
80
70
mA
220
200
180
160
mA
120
110
100
90
mA
350
320
310
300
mA
900
820
750
650
mA
510
480
460
440
mA
10
10
10
10
mA
1050
935
860
830
mA
10.5 CAPACITANCE
Parameter
Input capacitance ( CK, CK )
Input capacitance (A0~A11, BA0~BA1)
Input capacitance
( CKE, CS, RAS,CAS, WE )
Data & DQS input/output capacitance(DQ0~DQ31)
Input capacitance(DM0 ~ DM3)
(VDD=1.8V, TA= 25°C, f=1MHz)
Symbol
Min
Max
Unit
CIN1
1.5
3
pF
CIN2
1.5
3
pF
CIN3
1.5
3
pF
COUT
1.5
2
pF
CIN4
1.5
2
pF
50 of 53
Rev. 1.1 November 2005