K4J55323QG Datasheet, PDF (38/53 Pages) Samsung semiconductor – 256Mbit GDDR3 SDRAM

K4J55323QG
WRITE to PRECHARGE
256M GDDR3 SDRAM
T0
T1
T2
T3 T3n T4 T4n T5
T8
T9
T10
T11
/CK
CK
COMMAND
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
PRE
NOP
NOP
t_WR
t_RP
ADDRESS
Bank
Col b
Bank
(a or all)
t_DQSS (NOM)
WDQS
t_DQSS
DQ
DI
b
DM
t_DQSS (MIN)
WDQS
t_DQSS
DQ
DI
b
DM
t_DQSS (MAX)
WDQS
t_DQSS
DQ
DI
b
DM
DON’T CARE
TRANSITIONING DATA
NOTE :
1. DI b = data-in for column b.
2. Three subsequent elements of data-in the programmed order following DI b.
3. A burst of 4 is shown.
4. A8 is LOW with the WRITE command (auto precharge is disabled).
5. WRITE latency is set to 3
38 of 53
Rev. 1.1 November 2005