K4J55323QG Datasheet, PDF (21/53 Pages) Samsung semiconductor – 256Mbit GDDR3 SDRAM

K4J55323QG
SCAN AC ELECTRICAL CHARACTERISTICS
PARAMETER/CONDITON
Clock
Clock cycle time
Scan Command Time
Scan enable setup time
Scan enable hold time
Scan command setup time for SSH, SOE# and SOUT
Scan command hold time for SSH, SOE# and SOUT
Scan Capture Time
Scan capture setup Time
Scan capture hold Time
Scan Shift Time
Scan clock to valid scan output
Scan clock to scan output hold
*Note : 1. The parameter applies only when SEN is asserted.
2. Scan Enable should be issued earlier than other Scan Commands by 3ns.
SYMBOL
tSCK
tSES
tSEH
tSCS
tSCH
tSDS
tSCH
tSAC
tSOH
256M GDDR3 SDRAM
MIN
MAX
UNITS
NOTES
40
-
ns
1
20
-
ns
1,2
20
-
ns
1
14
-
ns
1
14
-
ns
1
10
-
ns
1
10
-
ns
1
-
6
ns
1
1.5
-
ns
1
Figure 4. Scan Initialization Sequence
VDD
VDDQ
VREF
RES
(SSH in Scan Mode)
CKE
(Dual-load C/A)
CKE
(Quad-load C/A)
SEN
SCK
SOE#
SOUT
Pins Under Test
tATS tATS
T = 200us
RESET at power - up
tSCS tSCH
tSDS tSDH
VALID
tSDS tSDH
VALID
tSES
tSCS
tSDS tSDH
VALID
Boundary Scan Mode
tSCS tSCH
tSCS
Scan Out
Bit0
Note : To set the pre-defined ODT for C/A, a boundary scan mode should be issued after an appropriate ODT initialization sequence with RES and CKE signals
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Rev. 1.1 November 2005