K4J55323QG Datasheet, PDF (27/53 Pages) Samsung semiconductor – 256Mbit GDDR3 SDRAM

K4J55323QG
Consecutive READ Bursts
T0
/CK
CK
COMMAND
READ
ADDRESS
Bank a,
Col n
RDQS
DQ
T2
READ
Bank a,
Col b
CL = 8
T7
NOP
256M GDDR3 SDRAM
T8
T8n
T9
T9n T10 T10n
NOP
NOP
NOP
DO
DO
n
b
DON’T CARE
TRANSITIONING DATA
NOTE :1. DO n (or b) = data-out from column n (or column b).
2. Burst length = 4
3. Three subsequent elements of data-out appear in the programmed order following DQ n.
4. Three subsequent elements of data-out appear in the programmed order following DQ b.
5. Shown with nominal t_AC and t_DQSQ.
6. Example applies when READ commands are issued to different devices or nonconsecutive READs.
7. RDQS will start driving high one half-clock cycle prior to the first falling edge of RDQS.
27 of 53
Rev. 1.1 November 2005