4501_M Datasheet, PDF (92/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
HARDWARE
INSTRUCTIONS
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
TAK1 (Transfer data to Accumulator from register K1)
Instruction D9
D0
code
1001011001
25
2
9
16
Number of
words
1
Number of Flag CY
cycles
1
–
Skip condition
–
Operation: (A) ← (K1)
Grouping: Input/Output operation
Description: Transfers the contents of key-on wakeup
control register K1 to register A.
TAK2 (Transfer data to Accumulator from register K2)
Instruction D9
D0
code
1001011010
25
2
A
16
Number of
words
1
Number of Flag CY
cycles
1
–
Skip condition
–
Operation: (A) ← (K2)
Grouping: Input/Output operation
Description: Transfers the contents of key-on wakeup
control register K2 to register A.
TALA (Transfer data to Accumulator from register LA)
Instruction D9
D0
code
1001001001
24
2
9
16
Number of
words
1
Number of Flag CY
cycles
1
–
Skip condition
–
Operation:
(A3, A2) ← (AD1, AD0)
(A1, A0) ← 0
Grouping: A/D conversion operation
Description: Transfers the low-order 2 bits (AD1, AD0) of
register AD to the high-order 2 bits (A3, A2)
of register A.
Note:
After this instruction is executed, “0” is
stored to the low-order 2 bits (A1, A0) of
register A.
TAM j (Transfer data to Accumulator from Memory)
Instruction D9
D0
Number of Number of Flag CY
code
101100j j j j
2 Cj
words
cycles
2
16
1
1
–
Skip condition
–
Operation:
(A) ← (M(DP))
(X) ← (X)EXOR(j)
j = 0 to 15
Grouping:
Description:
RAM to register transfer
After transferring the contents of M(DP) to
register A, an exclusive OR operation is per-
formed between register X and the value j in
the immediate field, and stores the result in
register X.
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
1-80