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4501_M Datasheet, PDF (146/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES
4501 Group
APPLICATION
2.3 Timers
➀ Disable Interrupts
Timer 1 interrupt and INT interrupt are temporarily disabled.
Interrupt enable flag INTE “0”
All interrupts disabled (DI instruction)
b3
b0
Interrupt control register V1 ✕ 0 ✕ 0 Timer 1 interrupt occurrence disabled
(TV1A instruction)
INT interrupt occurrence disabled
➁ Initialize valid waveform
INT pin is initialized.
INT pin input disabled, Timer 1 control disabled.
Interrupt control register I1
b3
b0 INT pin input disabled (TI1A instruction)
0 ✕ ✕ 0 Timer 1 control disalbed
➂ Stop Timer Operation
Timer 1 and prescaler are temporarily stopped.
Dividing ratio of prescaler is selected.
Timer control register W1
b3
b0
010 1
Timer 1 stop (TW1A instruction)
Prescaler stop
Prescaler divided by 16 selected
Count start synchronous circuit selected
➃ Set Port
P13/INT pin is set to INT input.
b3
b0
Port P13 output latch 1 ✕ ✕ ✕ Input mode is set (OP1A instruction)
➄ Set Timer Value
Timer 1 count time is set.
Timer 1 reload register R1 “5216”
Timer count value 82 set (T1AB instruction)
➅ Clear Interrupt Request
Timer 1 interrupt activated condition is cleared.
Timer 1 interrupt request flag T1F “0”
Timer 1 interrupt activated condition cleared
(SNZT1 instruction)
Note when the interrupt request is cleared
When ➅ is executed, considering the skip of the next instruction according to the
interrupt request flag T1F, insert the NOP instruction after the SNZT1 instruction.
➆ Start Timer Operation
Timer 1 and prescaler temporarily stopped are restarted.
Timer control register W1
b3
1
11
b0
1
Timer 1 operating (TW1A instruction)
Prescaler operating
Continue to Figure 2.3.7 on the next page.
Fig. 2.3.6 Timer start by external input setting example (1)
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
2-29