4501_M Datasheet, PDF (160/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
APPLICATION
2.7 RAM back-up
Table 2.7.2 Return source and return condition
Return source
Return condition
Remarks
Port P0
Return by an external “L” level input. Key-on wakeup function can be selected with
Port P1 (Note)
every one port. Set the port using the key-on
Port P2
wakeup function to “H” level before going into
Port D2/C
the RAM back-up state.
Port D3/K
Port P13/INT
(Note)
Return by an external “H” level or “L” Select the return level (“L” level or “H” level)
level input. The return level can be with the bit 2 of register I1 according to the
selected by register I12. When the external state before going into the RAM back-
return level is input, the EXF0 flag is up state.
not set.
Note: When the bit 3 (K13) of the key-on wakeup control register K1 is “0”, the key-on wakeup (“H” level
or “L” level) of INT pin is set. When the K13 is “1”, the key-on wakeup (“L” level) of port P13 is set.
(2) Start condition identification
When system returns from both RAM back-up mode and reset, software is started from address 0
in page 0.
The start condition (warm start or cold start) can be identified by examining the state of the power
down flag (P) with the SNZP instruction.
Table 2.7.3 Start condition identification
Return condition
External wakeup signal input
Reset
P flag
1
0
Program start
P = “1”
Yes
?
No
Cold start
Warm start
Fig. 2.7.1 Start condition identified example
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
2-43