4501_M Datasheet, PDF (64/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
HARDWARE
LIST OF PRECAUTIONS
19 _{External clock}
When the external signal clock is used as the source oscillation
(f(XIN)), note that the RAM back-up mode (POF and POF2 in-
structions) cannot be used.
20 _{Notes for the use of A/D conversion 1}
Note the following when using the analog input pins also for port
P2 function:
• Selection of analog input pins
Even when P20/AIN0 and P21/AIN1 are set to pins for analog in-
put, they continue to function as port P2 input/output.
Accordingly, when any of them are used as I/O port and others
are used as analog input pins, make sure to set the outputs of
pins that are set for analog input to “1.” Also, the port input func-
tion of the pin functions as an analog input is undefined.
• TALA instruction
When the TALA instruction is executed, the low-order 2 bits of
register AD is transferred to the high-order 2 bits of register A, si-
multaneously, the low-order 2 bits of register A is “0.”
21 _{Notes for the use of A/D conversion 2}
Do not change the operating mode (both A/D conversion mode
and comparator mode) of A/D converter with the bit 3 of register
Q1 while the A/D converter is operating.
When the operating mode of A/D converter is changed from the
comparator mode to A/D conversion mode with the bit 3 of regis-
ter Q1, note the following;
• Clear the bit 2 of register V2 to “0” (refer to Figure 52➀) to
change the operating mode of the A/D converter from the com-
parator mode to A/D conversion mode with the bit 3 of register
Q1.
• The A/D conversion completion flag (ADF) may be set when the
operating mode of the A/D converter is changed from the com-
parator mode to the A/D conversion mode. Accordingly, set a
value to the bit 3 of register Q1, and execute the SNZAD instruc-
tion to clear the ADF flag.
LA 8
TV2A
LA 0
TQ1A
SNZAD
NOP
; (✕0✕✕2)
; The SNZAD instruction is valid ........ ➀
; (0✕✕✕2)
; Operation mode of A/D converter is
changed from comparator mode to A/D
conversion mode.
✕ : these bits are not used here.
Fig. 52 A/D conversion interrupt program example
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
22 _{Notes for the use of A/D conversion 3}
Each analog input pin is equipped with a capacitor which is used
to compare the analog voltage. Accordingly, when the analog
voltage is input from the circuit with high-impedance and, charge/
discharge noise is generated and the sufficient A/D accuracy
may not be obtained. Therefore, reduce the impedance or, con-
nect a capacitor (0.01 µF to 1 µF) to analog input pins (Figure 53).
When the overvoltage applied to the A/D conversion circuit may
occur, connect an external circuit in order to keep the voltage
within the rated range as shown the Figure 54. In addition, test
the application products sufficiently.
Sensor
AIN
Apply the voltage withiin the specifications
to an analog input pin.
Fig. 53 Analog input external circuit example-1
Sensor
About 1kΩ
AI N
Fig. 54 Analog input external circuit example-2
23 _{Electric Characteristic Differences Between Mask ROM and One}
Time PROM Version MCU
There are differences in electric characteristics, operation margin,
noise immunity, and noise radiation between Mask ROM and One
Time PROM version MCUs due to the difference in the manufac-
turing processes.
When manufacturing an application system with the One time
PROM version and then switching to use of the Mask ROM ver-
sion, please perform sufficient evaluations for the commercial
samples of the Mask ROM version.
24 _{Note on Power Source Voltage}
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and
may perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the supply voltage is less than the
recommended operating conditions and design a system not to
cause errors to the system by this unstable operation.
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