4501_M Datasheet, PDF (30/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
HARDWARE
FUNCTION BLOCK OPERATIONS
DATA MEMORY (RAM)
1 word of RAM is composed of 4 bits, but 1-bit manipulation (with
the SB j, RB j, and SZB j instructions) is enabled for the entire
memory area. A RAM address is specified by a data pointer. The
data pointer consists of registers Z, X, and Y. Set a value to the
data pointer certainly when executing an instruction to access
RAM.
Table 2 shows the RAM size. Figure 12 shows the RAM map.
Table 2 RAM size
Part number
M34501M2
M34501M4
M34501E4
RAM size
128 words ✕ 4 bits (512 bits)
256 words ✕ 4 bits (1024 bits)
256 words ✕ 4 bits (1024 bits)
• Note
Register Z of data pointer is undefined after system is released
from reset.
Also, registers Z, X and Y are undefined in the RAM back-up. After
system is returned from the RAM back-up, set these registers.
RAM 256 words ✕ 4 bits (1024 bits)
Register Z
0
Register X 0 ₁ 2 3 ^... 6 7 ^........ 15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Z=0, X=0 to 15
256 words (1024 bits) M34501M4/E4
Z=0, X=0 to 7
128 words (512 bits) M34501M2
Fig. 12 RAM map
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
1-18