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4501_M Datasheet, PDF (152/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES | |||
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4501 Group
APPLICATION
2.4 A/D converter
â Disable Interrupts
A/D interrupt is temporarily disabled.
Interrupt enable flag INTE â0â
All interrupts disabled (DI instruction)
Interrupt control register V2
b3
â
0
b0
ââ
A/D interrupt occurrence
(TV2A instruction)
disabled
â Set A/D Converter
A/D conversion mode is selected to A/D operation mode.
Analog input pin AIN0 is selected.
b3
b0
A/D control register Q1 0 â 0 0 A/D conversion mode, AIN0 selected
(TQ1A instruction)
â Clear Interrupt Request
A/D interrupt activated condition is cleared.
A/D conversion completion flag ADF â0â
A/D conversion interrupt activated condition cleared
(SNZAD instruction)
Note when the interrupt request is cleared
When â is executed, considering the skip of the next instruction according to the
flag ADF, insert the NOP instruction after the SNZAD instruction.
When interrupt is
not used
â Set Interrupt
Interrupts except A/D conversion is
enabled (EI instruction)
When interrupt is used
â Set Interrupt
A/D conversion interrupt temporarily disabled is enabled.
Interrupt control register V2
b3
â
b0
1ââ
A/D interrupt occurrence enabled
(TV2A instruction)
Interrupt enable flag INTE â1â
All interrupts enabled
(EI instruction)
â Start A/D Conversion
A/D conversion operation is started (ADST instruction).
When interrupt is not used
â
Check A/D Interrupt Request
A/D conversion completion flag is
checked (SNZAD instruciton)
When interrupt is used
â
A/D Conversion Interrupt Occur
â Execute A/D Conversion
High-order 8 bits of register AD â Register A and register B (TABAD instruction)
Low-order 2 bits of register AD â High-order 2 bits of register A (TALA instruction)
â0â is set to low-order 2 bits of register A
When A/D conversion is executed by the same channel, â to â is repeated.
When A/D conversion is executed by the another channel, â to â is repeated.
âââ: it can be â0â or â1.â
Fig. 2.4.2 A/D conversion mode setting example
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
2-35
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