4501_M Datasheet, PDF (23/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
HARDWARE
PIN DESCRIPTION
Key-on wakeup input
“L” level
detection circuit
Register A
Ai
(Note 2)
Ai
IAP1 instruction
D
OP1A instruction ^{T Q}
Pull-up transistor
K1i (Note 2)
PU1i (Note 2)
(Note 1)
P10, P11 (Note 3)
Key-on wakeup input
K12
“L” level
detection circuit
W21
W20
Clock input for timer 2 event counter
IAP1 instruction
Register A
A2
A2
OP1A instruction
D
TQ
W60
0
Timer 1 or timer 2 underflow
1
signal divided by 2
Pull-up transistor
PU12
(Note 1)
P12/CNTR (Note 3)
Key-on wakeup input
K13
“L” level
detection circuit
K13
External 0 interrupt External interrupt circuit
IAP1 instruction
Register A
A3
A3
OP1A instruction
D
TQ
Pull-up transistor
PU13
(Note 1)
P13/INT (Note 3)
Notes 1:
This symbol represents a parasitic diode on the port.
2: i represents 0 or 1.
3: Applied potential to port P1 must be VDD or less.
Port block diagram (3)
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
1-11