4501_M Datasheet, PDF (162/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
APPLICATION
2.7 RAM back-up
(3) Key-on wakeup control register K2
Register K2 controls the ON/OFF of the key-on wakeup function of ports P20, P21, D2/C and D3/K.
Set the contents of this register through register A with the TK2A instruction.
The contents of register K2 is transferred to register A with the TAK2 instruction.
Table 2.7.6 shows the key-on wakeup control register K2.
Table 2.7.6 Key-on wakeup control register K2
Key-on wakeup control register K2
at reset : 00002 at RAM back-up : state retained
Port D3/K
K23
key-on wakeup control bit
0 Key-on wakeup invalid
1 Key-on wakeup valid
Port D2/C
K22
key-on wakeup control bit
0 Key-on wakeup invalid
1 Key-on wakeup valid
Port P21/AIN1
K21
key-on wakeup control bit
0 Key-on wakeup invalid
1 Key-on wakeup valid
Port P20/AIN0
K20
key-on wakeup control bit
0 Key-on wakeup invalid
1 Key-on wakeup valid
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
(4) Pull-up control register PU0
Register PU0 controls the ON/OFF of the ports P00–P03 pull-up transistor.
Set the contents of this register through register A with the TPU0A instruction.
Table 2.7.7 shows the pull-up control register PU0.
Table 2.7.7 Pull-up control register PU0
Pull-up control register PU0
at reset : 00002 at RAM back-up : state retained W
Port P03
PU03
pull-up transistor control bit
Port P02
PU02
pull-up transistor control bit
Port P01
PU01
pull-up transistor control bit
Port P00
PU00
pull-up transistor control bit
Note: “W” represents write enabled.
0 Pull-up transistor OFF
1 Pull-up transistor ON
0 Pull-up transistor OFF
1 Pull-up transistor ON
0 Pull-up transistor OFF
1 Pull-up transistor ON
0 Pull-up transistor OFF
1 Pull-up transistor ON
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
2-45