4501_M Datasheet, PDF (176/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
APPENDIX
3.1 Electrical characteristics
3.1.5 Voltage drop detection circuit characteristics
Table 3.1.7 Voltage drop detection circuit characteristics
(Ta = –20 °C to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Unit
Min.
Typ.
Max.
VRST
Detection voltage (Note 1)
Ta = 25 °C
2.7
4.2
V
3.3
3.5
3.7
Operation current of voltage RAM back-up mode
VDD = 5.0 V
IRST
drop detection circuit
(POF instruction execution) (Note 2)
50
100
µA
Notes 1: The detected voltage (VRST) is defined as the voltage when reset occurs while the supply voltage (VDD) is falling.
2: The voltage drop detection circuit is operating in the RAM back-up with the POF instruction (It stops in the RAM back-up with the POF2 instruction).
3.1.6 Basic timing diagram
Parameter
Clock
Machine cycle
Mi
Pin name
XIN : high-speed mode
(System clock = f(XIN))
Mi+1
XIN : middle-speed mode
(System clock = f(XIN)/2)
XIN : low-speed mode
(System clock = f(XIN)/4)
XIN : default mode
(System clock = f(XIN)/8)
Port D output
D0, D1, D2/C, D3/K
Port D input
D0, D1, D2/C, D3/K
Port P0, P1, P2
output
Port P0, P1, P2
input
Timer output
Timer input
Interrupt input
P00–P03
P10–P13
P20, P21
P00–P03
P10–P13
P20, P21
CNTR
CNTR
INT
Rev.2.01 Feb 07, 2005
3-7
REJ09B0192-0201