4501_M Datasheet, PDF (121/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
APPLICATION
2.1 I/O pins
(5) Port C
Port C is a 1-bit I/O port.
s Input/output of port C
q Data input to port C
Set the output latch of specified port C to “1” with the SCP instruction. If the output latch is set
to “0,” “L” level is input.
When the SNZCP instruction is executed, if the port C is “1,” the next instruction is skipped.
If it is “0,” the next instruction is executed.
q Data output from port C
Set the output level to the output latch with the SCP and RCP instructions.
The state of pin enters the high-impedance state when the SCP instruction is executed.
The state of pin becomes “L” level when the RCP instruction is executed.
The output structure is an N-channel open-drain.
Note: Port C is also used as port D2. Accordingly, when using port C, set the output latch to “1” with
the SD instruction.
(6) Port K
Port K is a 1-bit I/O port.
s Input/output of port K
q Data input to port K
Set the output latch of specified port K to “1” with the OKA instruction. If the output latch is set
to “0,” “L” level is input.
The state of port K is transferred to register A when the IAK instruction is executed.
However, port K is 1 bit and A1, A2 and A3 are fixed to “0.”
q Data output from port K
The contents of register A is output to port K with the OKA instruction.
The output structure is an N-channel open-drain.
Note: Port K is also used as port D3. Accordingly, when using port K, set the output latch to “1” with
the SD instruction.
Rev.2.01 Feb 07, 2005
2-4
REJ09B0192-0201