4501_M Datasheet, PDF (29/212 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES

4501 Group
HARDWARE
FUNCTION BLOCK OPERATIONS
PROGRAM MEMOY (ROM)
The program memory is a mask ROM. 1 word of ROM is composed
of 10 bits. ROM is separated every 128 words by the unit of page
(addresses 0 to 127). Table 1 shows the ROM size and pages. Fig-
ure 10 shows the ROM map of M34501M4.
Table 1 ROM size and pages
Part number
M34501M2
M34501M4
M34501E4
ROM (PROM) size
(✕ 10 bits)
2048 words
4096 words
4096 words
Pages
16 (0 to 15)
32 (0 to 31)
32 (0 to 31)
9
000016
007F16
008016
00FF16
010016
017F16
018016
87654321
Interrupt address page
Subroutine special page
0
Page 0
Page 1
Page 2
Page 3
A part of page 1 (addresses 008016 to 00FF16) is reserved for in-
terrupt addresses (Figure 11). When an interrupt occurs, the
address (interrupt address) corresponding to each interrupt is set
in the program counter, and the instruction at the interrupt address
is executed. When using an interrupt service routine, write the in-
struction generating the branch to that routine at an interrupt
address.
Page 2 (addresses 010016 to 017F16) is the special page for sub-
routine calls. Subroutines written in this page can be called from
any page with the 1-word instruction (BM). Subroutines extending
from page 2 to another page can also be called with the BM in-
struction when it starts on page 2.
ROM pattern (bits 7 to 0) of all addresses can be used as data ar-
eas with the TABP p instruction.
0FFF16
Page 31
Fig. 10 ROM map of M34501M4/M34501E4
98 7 6 5 4 3 2 10
008016 External 0 interrupt address
008216
008416 Timer 1 interrupt address
008616 Timer 2 interrupt address
008816
008A16
008C16
A/D interrupt address
008E16
00FF16
Fig. 11 Page 1 (addresses 008016 to 00FF16) structure
Rev.2.01 Feb 07, 2005
REJ09B0192-0201
1-17