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4583 Datasheet, PDF (9/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Register Y
Decoder
Skip decision
SZD instruction
SD instruction
RD instruction
CLD
instruction
Timer 1 underflow signal 1/2
S
RQ
W23
0
FR22
W60
0
1
Timer 2 underflow signal 1/2
1
W62
Clock (input) for timer 1 event count
0
or period measurement signal input
1
Clock (input) for timer 3 event count
Timer 3 underflow signal
W61
PWMOD
SCP instruction
D
T RQ
W32
SQ
RCP instruction
R
W30
W31
(Note 1)
D6/CNTR0
(Note 2)
W10
W11
W50
W51
(Note 1)
C/CNTR1 (Note 2)
(Note 1) (Note 3)
Notes 1:
This symbol represents a parasitic diode on the port.
2: Applied potential to these ports must be VDD or less.
3: When CNTR1 input is selected, output transistor is turned OFF.
Port block diagram (2)
Rev.3.00 Aug 06, 2004 page 9 of 151
REJ03B0009-0300Z