4583 Datasheet, PDF (10/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
(Note 3)
IAP0 instruction
Register A
Aj
FR00
Key-on
wakeup
Aj
D
OP0A instruction T Q
K11
K10
0
Level detection circuit
0
1
Edge detection circuit
1
(Note 4)
IAP0 instruction
Register A
Ak
FR01
Key-on
wakeup
Ak
D
OP0A instruction T Q
K13
K12
0
Level detection circuit
0
1
Edge detection circuit
1
(Note 3)
IAP1 instruction
Register A
Aj
FR02
Aj
OP1A instruction
D
TQ
Key-on
wakeup
Level detection circuit
(Note 4)
IAP1 instruction
Register A
Ak
FR03
Ak
OP1A instruction
D
TQ
Key-on
wakeup
Level detection circuit
Pull-up
transistor
PU0j
(Note 3)
(Note 1)
P00, P01_{(Note 2)}
(Note 1)
K00
Pull-up
transistor
PU0k
(Note 4)
(Note 1)
P02, P03(Note 2)
(Note 1)
K01
Pull-up
transistor
PU1j
(Note 3)
(Note 1)
P10, P11(Note 2)
(Note 1)
K02
Pull-up
transistor
PU1k
(Note 4)
(Note 1)
P12, P13(Note 2)
(Note 1)
K03
Notes 1:
This symbol represents a parasitic diode on the port.
2: Applied potential to these ports must be VDD or less.
3: j represents bits 0 and 1.
4: k represents bits 2 and 3.
Port block diagram (3)
Rev.3.00 Aug 06, 2004 page 10 of 151
REJ03B0009-0300Z