4583 Datasheet, PDF (7/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
CONNECTIONS OF UNUSED PINS
Pin
Connection
XIN
Open.
XOUT
Open.
D0–D5
D6/CNTR0
C/CNTR1
P00–P03
Open.
Connect to VSS.
Open.
Connect to VSS.
Open.
Open.
Connect to VSS.
P10–P13
Open.
Connect to VSS.
P20
Open.
Connect to VSS.
P21
Open.
Connect to VSS.
P22
Open.
Connect to VSS.
P30/INT0
Open.
Connect to Vss.
P31/INT1
Open.
Connect to Vss.
P32, P33
Open.
Connect to Vss.
P60/AIN0, P61/AIN1 Open.
P62, P63
Connect to Vss.
Usage condition
Internal oscillator is selected.
Internal oscillator is selected.
RC oscillator is selected.
External clock input is selected for main clock.
N-channel open-drain is selected for the output structure.
CNTR0 input is not selected for timer 1 count source.
N-channel open-drain is selected for the output structure.
CNTR1 input is not selected for timer 3 count source.
The key-on wakeup function is not selected.
N-channel open-drain is selected for the output structure.
The pull-up function is not selected.
The key-on wakeup function is not selected.
The key-on wakeup function is not selected.
N-channel open-drain is selected for the output structure.
The pull-up function is not selected.
The key-on wakeup function is not selected.
“0” is set to output latch.
“0” is set to output latch.
(Note 1)
(Note 1)
(Note 2)
(Note 3)
(Note 4)
(Note 4)
(Note 6)
(Note 5)
(Note 4)
(Note 6)
(Note 7)
(Note 5)
(Note 4)
(Note 7)
Notes 1: After system is released from reset, the internal oscillation (on-chip oscillator) is selected for system clock (RG0=0, MR0=1).
2: When the CRCK instruction is executed, the RC oscillation circuit becomes valid. Be careful that the swich of system clock is not executed at oscilla-
tion start only by the CRCK instruction execution.
In order to start oscillation, setting the main clock f(XIN) oscillation to be valid (MR1=0) is required. (If necessary, generate the oscillation stabilizing
wait time by software.)
Also, when the main clock (f(XIN)) is selected as system clock, set the main clock f(XIN) oscillation (MR1=0) to be valid, and select main clock f(XIN)
(MR0=0). Be careful that the switch of system clock cannot be executed at the same time when main clock oscillation is started.
3: In order to use the external clock input for the main clock f(XIN), select the ceramic resonance by executing the CMCK instruction at the beggining of
software, and then set the main clock (f(XIN)) oscillation to be valid (MR1=0). Until the main clock (f(XIN)) oscillation becomes valid (MR1=0) after ce-
ramic resonance becomes valid, XIN pin is fixed to “H”. When an external clock is used, insert a 1 kΩ resistor to XIN pin in series for limits of current.
4: Be sure to select the output structure of ports D0–D5 and the pull-up function of P00–P03 and P10–P13 with every one port. Set the corresponding
bits of registers for each port.
5: Be sure to select the output structure of ports P00–P03 and P10–P13 with every two ports. If only one of the two pins is used, leave another one
open.
6: The key-on wakeup function is selected with every two bits. When only one of key-on wakeup function is used, considering that the value of key-on
wake-up control register K1, set the unused 1-bit to “H” input (turn pull-up transistor ON and open) or “L” input (connect to VSS, or open and set the
output latch to “0”).
7: The key-on wakeup function is selected with every two bits. When one of key-on wakeup function is used, turn pull-up transistor of unused one ON
and open.
(Note when connecting to VSS and VDD)
q Connect the unused pins to VSS and VDD using the thickest wire at the shortest distance against noise.
Rev.3.00 Aug 06, 2004 page 7 of 151
REJ03B0009-0300Z