4583 Datasheet, PDF (107/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
TALA (Transfer data to Accumulator from register LA)
Instruction D9
D0
code
1001001001
24
2
9
16
Number of
words
1
Number of Flag CY
cycles
1
–
Skip condition
–
Operation:
(A3, A2) ← (AD1, AD0)
(A1, A0) ← 0
Grouping: A/D conversion operation
Description: Transfers the low-order 2 bits (AD1, AD0) of
register AD to the high-order 2 bits (A3, A2)
of register A.
Note:
After this instruction is executed, “0” is
stored to the low-order 2 bits (A1, A0) of
register A.
TAM j (Transfer data to Accumulator from Memory)
Instruction D9
D0
Number of Number of Flag CY
code
101100j j j j
2 Cj
words
cycles
2
16
1
1
–
Skip condition
–
Operation:
(A) ← (M(DP))
(X) ← (X)EXOR(j)
j = 0 to 15
Grouping: RAM to register transfer
Description: After transferring the contents of M(DP) to
register A, an exclusive OR operation is
performed between register X and the value
j in the immediate field, and stores the re-
sult in register X.
TAMR (Transfer data to Accumulator from register MR)
Instruction D9
D0
code
1001010010
25
2
2
16
Number of
words
1
Number of Flag CY
cycles
1
–
Skip condition
–
Operation: (A) ← (MR)
Grouping: Clock operation
Description: Transfers the contents of clock control reg-
ister MR to register A.
TAPU0 (Transfer data to Accumulator from register PU0)
Instruction D9
D0
code
1
0
0
1
0
1
0
1
1
1
2
2
5
7 ₁₆
Number of
words
1
Number of
cycles
1
Flag CY
–
Skip condition
–
Operation: (A) ← (PU0)
Grouping: Input/Output operation
Description: Transfers the contents of pull-up control
register PU0 to register A.
Rev.3.00 Aug 06, 2004 page 107 of 151
REJ03B0009-0300Z