4583 Datasheet, PDF (101/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
SZD (Skip if Zero, port D specified by register Y)
Instruction
code
D9
D0
Number of Number of Flag CY
0000100100
024
words
cycles
2
16
2
2
–
0 0 0 0 1 0 1 0 1 1 ₂ 0 2 B ₁₆
Skip condition
(D(Y)) = 0
(Y) = 0 to 6
Operation:
(D(Y)) = 0 ?
(Y) = 0 to 6
Grouping: Input/Output operation
Description: Skips the next instruction when a bit of port
D specified by register Y is “0.” Executes the
next instruction when the bit is “1.”
T1AB (Transfer data to timer 1 and register R1 from Accumulator and register B)
Instruction
code
D9
D0
Number of Number of
1000110000
230
2
16
words
1
cycles
1
Flag CY
–
Skip condition
–
Operation:
(T17–T14) ← (B)
(R17–R14) ← (B)
(T13–T10) ← (A)
(R13–R10) ← (A)
Grouping: Timer operation
Description: Transfers the contents of register B to the
high-order 4 bits of timer 1 and timer 1 re-
load register R1. Transfers the contents of
register A to the low-order 4 bits of timer 1
and timer 1 reload register R1.
T2AB (Transfer data to timer 2 and register R2 from Accumulator and register B)
Instruction
code
D9
D0
Number of Number of Flag CY
1000110001
231
words
cycles
2
16
1
1
–
Skip condition
–
Operation:
(T27–T24) ← (B)
(R27–R24) ← (B)
(T23–T20) ← (A)
(R23–R20) ← (A)
Grouping: Timer operation
Description: Transfers the contents of register B to the
high-order 4 bits of timer 2 and timer 2 re-
load register R2. Transfers the contents of
register A to the low-order 4 bits of timer 2
and timer 2 reload register R2.
T3AB (Transfer data to timer 3 and register R3 from Accumulator and register B)
Instruction
code
D9
D0
Number of Number of
1
0
0
0
1
1
0
0
1
0
2
2
3
2 ₁₆
words
1
cycles
1
Flag CY
–
Skip condition
–
Operation:
(T37–T34) ← (B)
(R37–R34) ← (B)
(T33–T30) ← (A)
(R33–R30) ← (A)
Grouping: Timer operation
Description: Transfers the contents of register B to the
high-order 4 bits of timer 3 and timer 3 re-
load register R3. Transfers the contents of
register A to the low-order 4 bits of timer 3
and timer 3 reload register R3.
Rev.3.00 Aug 06, 2004 page 101 of 151
REJ03B0009-0300Z