4583 Datasheet, PDF (137/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Skip condition
Datailed description
–
–
–
(P) = 1
(WDF1) = 1
–
–
–
–
–
–
–
– No operation; Adds 1 to program counter value, and others remain unchanged.
– Puts the system in RAM back-up state by executing the POF instruction after executing the EPOF instruction.
– Makes the immediate after POF instruction valid by executing the EPOF instruction.
– Skips the next instruction when the P flag is “1”.
After skipping, the P flag remains unchanged.
– Skips the next instruction when watchdog timer flag WDF1 is “1.” After skipping, clears (0) to the WDF1 flag.
Also, stops the watchdog timer function when executing the WRST instruction immediately after the DWDT
instruction.
– Stops the watchdog timer function by the WRST instruction after executing the DWDT instruction.
– System reset occurs.
– The voltage drop detection circuit is valid at RAM back-up mode when VDCE pin is “H”.
– Sets referring data area to pages 0 to 63 when the TABP p instruction is executed.
This instruction is valid only for the TABP p instruction.
– Sets referring data area to pages 64 to 127 when the TABP p instruction is executed.
This instruction is valid only for the TABP p instruction.
– Transfers the high-order 4 bits (SI7–SI4) of register SI to register B, and transfers the low-order 4 bits (SI3–
SI0) of register SI to register A.
– Transfers the contents of register B to the high-order 4 bits (SI7–SI4) of register SI, and transfers the con-
tents of register A to the low-order 4 bits (SI3–SI0) of register SI.
Rev.3.00 Aug 06, 2004 page 137 of 151
REJ03B0009-0300Z