4583 Datasheet, PDF (146/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
A/D CONVERTER RECOMMENDED OPERATING CONDITIONS
(Comparator mode included, Ta = –20 °C to 85 °C, unless otherwise noted)
Symbol
Parameter
Conditions
VDD
Supply voltage
VIA
f(ADCK)
Analog input voltage
A/D conversion clock
frequency
(Note)
Mask ROM version
One Time PROM version
Mask ROM version
One Time PROM version
Note: Definition of A/D conversion clock (ADCK)
VDD = 4.0 to 5.5 V
VDD = 2.7 to 5.5 V
VDD = 2.2 to 5.5 V
VDD = 2.0 to 5.5 V
VDD = 4.0 to 5.5 V
VDD = 3.0 to 5.5 V
Limits
Unit
Min.
Typ.
Max.
2.0
5.5
V
3.0
5.5
0
VDD
V
0.8
334
kHz
0.8
245
0.8
3.9
0.8
1.8
0.8
334
0.8
123
On-chip oscillator clock (RING)
Division circuit ^{MR3, MR2}
11
System clock (STCK)
Divided by 8
10
On-chip oscillator
Ceramic resonance
MR0
1
Divided by 4
01
Divided by 2
00
Internal clock
generating circuit
(divided by 3)
Instruction clock
(INSTCK)
XIN
RC oscillation
Multi-
0
plexer
Quartz-crystal
oscillation
(CMCK,
CRCK,
CYCK)
Q32
Instruction clock (INSTCK) ⁰
On-chip oscillator clock(RING) ₁
Division circuit
Divided by 48
Divided by 24
Divided by 12
Divided by 6
Q31, Q30
11
10
01
00
A/D conversion clock (ADCK)
<Operating condition map of A/D conversion clock (ADCK) >
f(ADCK)
[kHz]
334
245
(123)
Recommended
operating operation
3.9
(15.3)
1.8
0.8
2 2.2 2.7
4
(3.0)
( ): One Time PROM version
VDD[V]
5.5
Rev.3.00 Aug 06, 2004 page 146 of 151
REJ03B0009-0300Z