4583 Datasheet, PDF (148/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
VOLTAGE DROP DETECTION CIRCUIT CHARACTERISTICS
(Ta = –20 °C to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
VRST–
VRST+
VRST+ –
VRST–
IRST
Detection voltage
(reset occurs) (Note 1)
Detection voltage
(reset release) (Note 2)
Detection voltage hysteresis
Operation current (Note 3)
TRST
Detection time
Ta = 25 °C
Ta = 25 °C
VDD = 5 V
VDD = 3 V
VDD → (VRST– – 0.1 V) (Note 4)
Limits
Unit
Min.
Typ.
Max.
1.4
1.5
1.6
V
1.1
1.9
1.5
1.6
1.7
V
1.2
2.0
0.1
V
50
100
µA
30
60
0.2
1.2
ms
Notes 1: The detected voltage (VRST–) is defined as the voltage when reset occurs when the supply voltage (VDD) is falling.
2: The detected voltage (VRST+) is defined as the voltage when reset is released when the supply voltage (VDD) is rising from reset occurs.
3: When the voltage drop detection circuit is used (VDCE pin = “H”), IRST is added to IDD (power current).
4: The detection time (TRST) is defined as the time until reset occurs when the supply voltage (VDD) is falling to [VRST– – 0.1 V].
BASIC TIMING DIAGRAM
Machine cycle
Mi
Parameter
Pin (signal) name
Mi+1
System clock
STCK
Port D output
Port D input
D0–D6
D0–D6
Ports P0, P1, P2, P3,
P6 output
P00–P03
P10–P13
P20–P23
P30, P31
P60–P63
Ports P0, P1, P2, P3,
P6 input
P00–P03
P10–P13
P20–P23
P30, P31
P60–P63
Interrupt input
INT0, INT1
Rev.3.00 Aug 06, 2004 page 148 of 151
REJ03B0009-0300Z