4583 Datasheet, PDF (4/153 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4583 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
PIN DESCRIPTION
Pin
Name
VDD
Power supply
VSS
Ground
CNVSS
CNVSS
VDCE
Voltage drop
detection circuit
enable
RESET
Reset input/output
XIN
XOUT
D0–D6
P00–P03
Main clock input
Main clock output
I/O port D
Input is examined by
skip decision.
I/O port P0
P10–P13 I/O port P1
P20–P23
P30, P31
I/O port P2
I/O port P3
P60–P63 I/O port P6
C
CNTR0,
CNTR1
Output port C
Timer input/output
INT0, INT1 Interrupt input
AIN0, AIN1 Analog input
Input/Output
Function
—
Connected to a plus power supply.
—
Connected to a 0 V power supply.
—
Connect CNVSS to VSS and apply “L” (0V) to CNVSS certainly.
Input
This pin is used to operate/stop the voltage drop detection circuit. When “H“ level is
input to this pin, the circuit starts operating. When “L“ level is input to this pin, the
circuit stops operating.
I/O
An N-channel open-drain I/O pin for a system reset. When the SRST instruction,
watchdog timer, the built-in power-on reset or the voltage drop detection circuit
causes the system to be reset, the RESET pin outputs “L” level.
Input
Output
I/O pins of the main clock generating circuit. When using a ceramic resonator, connect
it between pins XIN and XOUT. When using a 32 kHz quartz-crystal oscillator, connect it
between pins XIN and XOUT. A feedback resistor is built-in between them. When using
the RC oscillation, connect a resistor and a capacitor to XIN, and leave XOUT pin open.
I/O
Each pin of port D has an independent 1-bit wide I/O function. The output structure
can be switched to N-channel open-drain or CMOS by software. For input use, set
the latch of the specified bit to “1” and select the N-channel open-drain. Port D6 is
also used as CNTR0 pin.
I/O
Port P0 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P0 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
I/O
Port P1 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P1 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
I/O
Port P2 serves as a 3-bit I/O port. The output structure is N-channel open-drain. For
input use, set the latch of the specified bit to “1”.
I/O
Port P3 serves as a 2-bit I/O port. The output structure is N-channel open-drain. For
input use, set the latch of the specified bit to “1”.
Ports P30 and P31 are also used as INT0 pin and INT1 pin, respectively.
I/O
Port P6 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain. For input use, set the latch of the specified bit to “1”. Ports P60, P61 are
also used as AIN0, AIN1, respectively.
Output Port C serves as a 1-bit port. The output structure is CMOS. For input use, set the
latch of the specified bit to “1”. Port C is also used as CNTR1.
I/O
CNTR0 pin has the function to input the clock for the timer 1 event counter, and to
output the timer 1 or timer 2 underflow signal divided by 2.
CNTR1 pin has the function to input the clock for the timer 3 event counter, and to
output the PWM signal generated by timer 4.CNTR0 pin and CNTR1 pin are also
used as Ports D6 and C, respectively.
Input
INT0 pin and INT1 pin accept external interrupts. They have the key-on wakeup func-
tion which can be switched by software. INT0 pin and INT1 pin are also used as
Ports P30 and P31, respectively.
Input
A/D converter analog input pins. AIN0 pin and AIN1 pin are also used as Ports P60 and
P61, respectively.
Rev.3.00 Aug 06, 2004 page 4 of 151
REJ03B0009-0300Z