RX64M_15 Datasheet, PDF (85/230 Pages) Renesas Technology Corp – Renesas MCUs

RX64M Group
Table 4.1
List of I/O Registers (Address Order) (14 / 71)
Address
0008 8114h
0008 8115h
0008 8116h
0008 8118h
0008 811Ah
0008 811Ch
0008 811Eh
0008 8120h
0008 8121h
0008 8122h
0008 8124h
0008 8125h
0008 8126h
0008 8128h
0008 812Ah
0008 8130h
0008 8131h
0008 8132h
0008 8134h
0008 8135h
0008 8136h
0008 8138h
0008 813Ah
0008 8140h
0008 8141h
0008 8142h
0008 8143h
0008 8144h
0008 8145h
0008 8146h
0008 8148h
0008 814Ah
0008 814Ch
0008 814Eh
0008 8150h
0008 8151h
0008 8152h
0008 8154h
0008 8155h
0008 8156h
0008 8158h
0008 815Ah
0008 8160h
0008 8161h
0008 8162h
0008 8164h
0008 8165h
0008 8166h
0008 8168h
0008 816Ah
Module
Symbol Register Name
TPU0 Timer Interrupt Enable Register
TPU0 Timer Status Register
TPU0 Timer Counter
TPU0 Timer General Register A
TPU0 Timer General Register B
TPU0 Timer General Register C
TPU0 Timer General Register D
TPU1 Timer Control Register
TPU1 Timer Mode Register
TPU1 Timer I/O Control Register
TPU1 Timer Interrupt Enable Register
TPU1 Timer Status Register
TPU1 Timer Counter
TPU1 Timer General Register A
TPU1 Timer General Register B
TPU2 Timer Control Register
TPU2 Timer Mode Register
TPU2 Timer I/O Control Register
TPU2 Timer Interrupt Enable Register
TPU2 Timer Status Register
TPU2 Timer Counter
TPU2 Timer General Register A
TPU2 Timer General Register B
TPU3 Timer Control Register
TPU3 Timer Mode Register
TPU3 Timer I/O Control Register H
TPU3 Timer I/O Control Register L
TPU3 Timer Interrupt Enable Register
TPU3 Timer Status Register
TPU3 Timer Counter
TPU3 Timer General Register A
TPU3 Timer General Register B
TPU3 Timer General Register C
TPU3 Timer General Register D
TPU4 Timer Control Register
TPU4 Timer Mode Register
TPU4 Timer I/O Control Register
TPU4 Timer Interrupt Enable Register
TPU4 Timer Status Register
TPU4 Timer Counter
TPU4 Timer General Register A
TPU4 Timer General Register B
TPU5 Timer Control Register
TPU5 Timer Mode Register
TPU5 Timer I/O Control Register
TPU5 Timer Interrupt Enable Register
TPU5 Timer Status Register
TPU5 Timer Counter
TPU5 Timer General Register A
TPU5 Timer General Register B
Register
Symbol
TIER
TSR
TCNT
TGRA
TGRB
TGRC
TGRD
TCR
TMDR
TIOR
TIER
TSR
TCNT
TGRA
TGRB
TCR
TMDR
TIOR
TIER
TSR
TCNT
TGRA
TGRB
TCR
TMDR
TIORH
TIORL
TIER
TSR
TCNT
TGRA
TGRB
TGRC
TGRD
TCR
TMDR
TIOR
TIER
TSR
TCNT
TGRA
TGRB
TCR
TMDR
TIOR
TIER
TSR
TCNT
TGRA
TGRB
R01DS0173EJ0100 Rev.1.00
Jul 31, 2014
4. I/O Registers
Number
of Bits
8
8
16
16
16
16
16
8
8
8
8
8
16
16
16
8
8
8
8
8
16
16
16
8
8
8
8
8
8
16
16
16
16
16
8
8
8
8
8
16
16
16
8
8
8
8
8
16
16
16
Access
Size
8
8
16
16
16
16
16
8
8
8
8
8
16
16
16
8
8
8
8
8
16
16
16
8
8
8
8
8
8
16
16
16
16
16
8
8
8
8
8
16
16
16
8
8
8
8
8
16
16
16
Number of Access Cycles
ICLK PCLK ICLK  PCLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
2, 3 PCLKB
2 ICLK
Related
Function
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
TPUa
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