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RX64M_15 Datasheet, PDF (185/230 Pages) Renesas Technology Corp – Renesas MCUs
RX64M Group
5. Electrical Characteristics
Table 5.33 RSPI Timing
Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0,
VCC_USBA = AVCC_USBA = 3.0 to 3.6 V,
VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V,
PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, Ta = Topr
Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 30 pF
High-drive output is selected by the driving ability control register.
Item
Symbol
Min.*1
Max.*1
Unit*1
Test
Conditions*2
RSPI RSPCK clock cycle
Master
Slave
tSPcyc
2
8
4096
4096
tPAcyc Figure 5.46
RSPCK clock high pulse
width
Master
Slave
RSPCK clock low pulse
width
Master
Slave
RSPCK clock rise/fall time Output
Input
tSPCKWH (tSPcyc – tSPCKR
—
ns
– tSPCKF) / 2 – 3
(tSPcyc – tSPCKR
—
– tSPCKF) / 2
tSPCKWL (tSPcyc – tSPCKR
—
ns
– tSPCKF) / 2 – 3
(tSPcyc – tSPCKR
—
– tSPCKF) / 2
tSPCKr,
—
tSPCKf
—
5
ns
1
μs
Data input setup time
Data input hold time
Master
tSU
Slave
Master PCLKA division
tHF
ratio set to 1/2
6
8.3 – tPAcyc
0
—
ns Figure 5.47 to
—
Figure 5.52
—
ns
PCLKA division
tH
tPAcyc
—
ratio set to a
value other
than 1/2
SSL setup time
SSL hold time
Data output delay time
Slave
Master
Slave
Master
Slave
Master
Slave
tLEAD
tLAG
tOD
8.3 + 2 × tPAcyc
1
4
1
4
—
—
—
8
—
8
—
6.3
3 × tPAcyc +
20
tSPcyc
tPAcyc
tSPcyc
tPAcyc
ns
Data output hold time
Master
Slave
tOH
0
0
—
ns
—
Successive transmission
delay time
MOSI and MISO
rise/fall time
Master
Slave
Output
Input
tTD
tSPcyc + 2 × tPAcyc 8 × tSPcyc
ns
+ 2 × tPAcyc
4 × tPAcyc
—
tDr, tDf
—
5
ns
—
1
μs
SSL
rise/fall time
Output
Input
tSSLr,
—
tSSLf
—
5
ns
1
μs
Slave access time
Slave output release time
tSA
—
tREL
—
4
tPAcyc Figure 5.51,
3
tPAcyc Figure 5.52
Note 1. tPAcyc: PCLKA cycle
Note 2. We recommend using pins that have a letter (“-A”, “-B”, etc.) to indicate group membership appended to their names as groups.
For the RSPI interface, the AC portion of the electrical characteristics is measured for each group.
R01DS0173EJ0100 Rev.1.00
Jul 31, 2014
Page 185 of 230