RX64M_15 Datasheet, PDF (162/230 Pages) Renesas Technology Corp – Renesas MCUs

RX64M Group
5. Electrical Characteristics
BCLK
Address bus
Address bus/
data bus
Address latch
(ALE)
Data read
(RD#)
Chip select
(CS1#)
Address cycle
Ta1
T_W1
Ta1
TW2
Tan
TW3
TW4
Data cycle
TW5
Tend
Tn1
Tn2
t_AD
tAD
tAD
t_ALED
tALED
tRDS tRDH
t_CSD
tRSD
tRSD
tCSD
Figure 5.16 Address/Data Multiplexed Bus Read Access Timing
BCLK
Address bus
Address bus/
data bus
Address latch
(ALE)
Data write
(WRm#)
Chip select
(CS1#)
Address cycle
Ta1
T_W1
Ta1
TW2
Tan
TW3
TW4
Data cycle
TW5
Tend
Tn1
Tn2
Tn3
tAD
tAD
tAD
tWDD
t_ALED
tALED
tWDH
t_CSD
tWRD
tWRD
tCSD
Figure 5.17 Address/Data Multiplexed Bus Write Access Timing
R01DS0173EJ0100 Rev.1.00
Jul 31, 2014
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