RX64M_15 Datasheet, PDF (176/230 Pages) Renesas Technology Corp – Renesas MCUs

RX64M Group
5.3.7
Timing of On-Chip Peripheral Modules
5. Electrical Characteristics
Table 5.23 I/O Port Timing
Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = V_BATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0,
VCC_USBA = AVCC_USBA = 3.0 to 3.6 V,
VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V,
PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, T_a = T_opr
Output load conditions: V_OH = VCC × 0.5, V_OL = VCC × 0.5, C = 30 pF
High-drive output is selected by the driving ability control register.
Item
I/O ports Input data pulse width
Note 1. t_PBcyc: PCLKB cycle
Symbol
Min.
t_PRW
1.5
Max.
—
Unit*¹
t_PBcyc
Test
Conditions
Figure 5.33
PCLKB
Port
t_PRW
Figure 5.33 I/O Port Input Timing
R01DS0173EJ0100 Rev.1.00
Jul 31, 2014
Page 176 of 230