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M306H2MC-XXXFP Datasheet, PDF (82/210 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306H2MC-XXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA ACQUISITION CONTROLLER
Timer Ai mode register
(When not using two-phase pulse signal processing)
b7 b6 b5 b4 b3 b2 b1 b0
0
01
Symbol
Address
When reset
TAiMR(i = 2 to 4) 039816 to 039A16 0016
Bit symbol
TMOD0
TMOD1
MR0
MR1
Bit name
Function
RW
Operation mode select bit b1 b0
0 1 : Event counter mode (Note 1)
Pulse output function
select bit
Count polarity
select bit (Note 3)
0 : Pulse is not output
(TA iOUT pin is a normal port pin)
1 : Pulse is output (Note 2)
(TA iOUT pin is a pulse output pin)
0 : Counts external signal's falling edge
1 : Counts external signal's rising edge
MR2
MR3
TCK0
Up/down switching
cause select bit
0 : Up/down flag's content
1 : TA iOUT pin's input signal (Note 4)
0 (Must always be fixed to “0” in event counter mode)
Count operation type
select bit
0 : Reload type
1 : Free-run type(Note 5)
TCK1
Invalid in event counter mode
Can be “0” or “1”
Note 1: In event counter mode, the count source is selected by the event / trigger select bit
(addresses 038216 and 038316).
Note 2: The settings of the corresponding port register and port direction register are invalid.
Note 3: Valid only when counting an external signal.
Note 4: When an “L” signal is input to the TAi OUT pin, the downcount is activated. When “H”,
the upcount is activated. Set the corresponding port direction register to “0”.
Note 5: In the case of using “Event counter mode” as “Free-Run type”, the timer register
contents may be unkown when counting begins.(Refer 3. Usage Precaution.)
Timer Ai mode register
(When using two-phase pulse signal processing)
b7 b6 b5 b4 b3 b2 b1 b0
0 1 0 00 1
Symbol
Address
When reset
TAiMR(i = 2 to 4) 039816 to 039A16 0016
Bit symbol
TMOD0
TMOD1
Bit name
Operation mode select bit
Function
b1 b0
0 1 : Event counter mode
RW
MR0
MR1
0 (Must always be “0” when using two-phase pulse signal
processing)
0 (Must always be “0” when using two-phase pulse signal
processing)
MR2
MR3
TCK0
1 (Must always be “1” when using two-phase pulse signal
processing)
0 (Must always be “0” when using two-phase pulse signal
processing)
Count operation type
select bit
0 : Reload type
1 : Free-run type(Note 3)
TCK1
Two-phase pulse
processing operation
select bit (Note 1)(Note 2)
0 : Normal processing operation
1 : Multiply-by-4 processing operation
Note 1: This bit is valid for timer A3 mode register. Timer A2 is fixed to normal processing
operation, and timer A4 is fixed to multiply-by-4 processing operation.
Note 2: When performing two-phase pulse signal processing, make sure the two-phase pulse
signal processing operation select bit (address 038416) is set to “1”. Also, always be
sure to set the event/trigger select bit (address 038316) to “00”.
Note 3: In the case of using “Event counter mode” as “Free-Run type”, the timer register
contents may be unkown when counting begins.(Refer 3. Usage Precaution.)
Figure 2.10.9 Timer Ai mode register in event counter mode
Rev. 1.0
81