M306H2MC-XXXFP Datasheet, PDF (183/210 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306H2MC-XXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA ACQUISITION CONTROLLER
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(3) The NMI interrupt
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• As for the NMI interrupt pin, an interrupt cannot be disabled. Connect it to the VCC pin via a resistor
(pull-up) if unused. Be sure to work on it.
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• Do not get either into stop mode with the NMI pin set to “L”.
(4) External interrupt
________ ________
• When the polarity of the INT0 to INT5 pins is changed, the interrupt request bit is sometimes set to “1”.
After changing the polarity, set the interrupt request bit to “0”.
(5) Rewrite the interrupt control register
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for
that register. If there is possibility of the interrupt request occur, rewrite the interrupt control register
after the interrupt is disabled. The program examples are described as follow:
Example 1:
INT_SWITCH1:
FCLR I
AND.B #00h, 0055h
NOP
NOP
FSET I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Four NOP instructions are required when using HOLD function.
; Enable interrupts.
Example 2:
INT_SWITCH2:
FCLR I
AND.B #00h, 0055h
MOV.W MEM, R0
FSET I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Dummy read.
; Enable interrupts.
Example 3:
INT_SWITCH3:
PUSHC FLG
FCLR I
AND.B #00h, 0055h
POPC FLG
; Push Flag register onto stack
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Enable interrupts.
The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted
before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the
interrupt control register is rewritten due to effects of the instruction queue.
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the
interrupt request bit is not set sometimes even if the interrupt request for that register has been gener
ated. This will depend on the instruction. If this creates problems, use the below instructions to change
the register.
Instructions : AND, OR, BCLR, BSET
Electric Characteristic Differences Between Mask ROM and Flash Memory Version MCUs
There are differences in electric characteristics, operation margin, noise immunity, and noise radiation
between Mask ROM and Flash Memory version MCUs due to the difference in the manufacturing
processes.
When manufacturing an application system with the Flash Memory version and then switching to use of
the Mask ROM version, please perform sufficient evaluations for the commercial samples of the Mask
ROM version.
Rev. 1.0
182