M306H2MC-XXXFP Datasheet, PDF (119/210 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306H2MC-XXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA ACQUISITION CONTROLLER
(1) Parity error signal output function
If a parity error is detected when the error signal output enable bit (address 037D16, bit 7) has been
set to “1”, a low-level signal can be output from the TxD2 pin. Also, when operating in transmit mode,
a transmit-complete interrupt is generated a half transfer clock cycle later than when the error signal
output enable bit (address 037D16, bit 7) is set to “0”. Therefore, a parity error signal can be detected
in the transmit-complete interrupt program. Figure 2.11.23 shows the timing at which a parity error
signal is output.
• LSB first
Transfer “H”
clock “L”
RxD2 “H”
“L”
TxD2 “H”
“L”
Receive “1”
complete flag “0”
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
Hi-Z
Figure 2.11.23 Output timing of the parity error signal
ST : Start bit
P : Even Parity
SP : Stop bit
(2) Direct format/inverse format
Connecting the SIM card allows you to switch between direct format and inverse format. If you choose
the direct format, D0 data is output from TxD2. If you choose the inverse format, D7 data is inverted
and output from TxD2.
Figure 2.11.24 shows the SIM interface format.
Transfer
clcck
TxD2
(direct)
D0 D1 D2 D3 D4 D5 D6 D7 P
TxD2
(inverse)
D7 D6 D5 D4 D3 D2 D1 D0 P
P : Even parity
Figure 2.11.24 SIM interface format
Rev. 1.0
118