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M306H2MC-XXXFP Datasheet, PDF (40/210 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER | |||
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MITSUBISHI MICROCOMPUTERS
M306H2MC-XXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA ACQUISITION CONTROLLER
Transition of stop mode, wait mode
Main clock is stopped
Sub clock is stopped
CM10 = â1â
Stop mode
Interrupt
Main clock is stopped
Sub clock is stopped Interrupt
Stop mode
CM10 = â1â
Main clock is stopped
Sub clock is stopped
Stop mode
CM10 = â1â
Interrupt
Reset
Medium-speed mode
(divided-by-8 mode)
WAIT
instruction
Interrupt
CPU operation stopped
Wait mode
High-speed/medium-
speed mode
WAIT
instruction
Interrupt
CPU operation stopped
Wait mode
Low-speed/low power
dissipation mode
WAIT
instruction
Interrupt
CPU operation stopped
Wait mode
Normal mode
(Refer to the following for the transition of normal mode.)
Transition of normal mode
Main clock is oscillating
Sub clock is stopped
Medium-speed mode
(divided-by-8 mode)
CM06 = â1â
BCLK : f(XIN)/8
CM07 = â0â CM06 = â1â
Main clock is oscillating CM04 = â0â
Sub clock is oscillating
CM04 = â1â
(Notes 1, 3)
High-speed mode
Medium-speed mode
(divided-by-2 mode)
BCLK : f(XIN)
CM07 = â0â CM06 = â0â
CM17 = â0â CM16 = â0â
BCLK : f(XIN)/2
CM07 = â0â CM06 = â0â
CM17 = â0â CM16 = â1â
Medium-speed mode
(divided-by-8 mode)
Medium-speed mode Medium-speed mode
(divided-by-4 mode) (divided-by-16 mode)
BCLK : f(XIN)/8
CM07 = â0â
CM06 = â1â
BCLK : f(XIN)/4
CM07 = â0â CM06 = â0â
CM17 = â1â CM16 = â0â
BCLK : f(XIN)/16
CM07 = â0â CM06 = â0â
CM17 = â1â CM16 = â1â
CM07 = â0â (Note 1)
CM06 = â1â
CM04 = â0â
CM07 = â0â
(Note 1, 3)
CM07 = â1â
(Note 2)
Main clock is oscillating
Sub clock is oscillating
Low-speed mode
BCLK : f(XCIN)
CM07 = â1â
CM05 = â0â
CM05 = â1â
CM06 = â0â
(Notes 1,3)
CM04 = â0â Main clock is oscillating CM04 = â1â
Sub clock is stopped
High-speed mode
Medium-speed mode
(divided-by-2 mode)
BCLK : f(XIN)
CM07 = â0â CM06 = â0â
CM17 = â0â CM16 = â0â
BCLK : f(XIN)/2
CM07 = â0â CM06 = â0â
CM17 = â0â CM16 = â1â
Medium-speed mode
(divided-by-4 mode)
BCLK : f(XIN)/4
CM07 = â0â CM06 = â0â
CM17 = â1â CM16 = â0â
Medium-speed mode
(divided-by-16 mode)
BCLK : f(XIN)/16
CM07 = â0â CM06 = â0â
CM17 = â1â CM16 = â1â
Main clock is stopped
Sub clock is oscillating
Low power dissipation mode (Note 5)
CM07 = â1â (Note 2)
CM05 = â1â
BCLK : f(XCIN)
CM07 = â1â
CM07 = â0â (Note 1)
CM06 = â0â (Note 3)
CM04 = â1â
Note 1: Switch clock after oscillation of main clock is sufficiently stable.
Note 2: Switch clock after oscillation of sub clock is sufficiently stable.
Note 3: Change CM06 after changing CM17 and CM16.
Note 4: T ransit in accordance with arrow.
Note 5: The device can be operated with a low supply voltage (VCC = 3.0 V)
in only low power dissipation mode. Always make sure the power
supply voltage VCC is switched between 5.0 V and 3.0 V in this mode
Figure 2.5.5 State transition diagram of Power control mode
Rev. 1.0
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