UM10360 Datasheet, PDF (664/835 Pages) NXP Semiconductors – LPC17xx User manual

NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 User Guide
2.4.4 LDR and STR, unprivileged
Load and Store with unprivileged access.
2.4.4.1 Syntax
op{type}T{cond} Rt, [Rn {, #offset}] ; immediate offset
where:
op is one of:
LDR: Load Register.
STR: Store Register.
type is one of:
B: unsigned byte, zero extend to 32 bits on loads.
SB: signed byte, sign extend to 32 bits (LDR only).
H: unsigned halfword, zero extend to 32 bits on loads.
SH: signed halfword, sign extend to 32 bits (LDR only).
—: omit, for word.
cond is an optional condition code, see Section 34–2.3.7 “Conditional execution”.
Rt is the register to load or store.
Rn is the register on which the memory address is based.
offset is an offset from Rn and can be 0 to 255. If offset is omitted, the address is the value
in Rn.
2.4.4.2 Operation
These load and store instructions perform the same function as the memory access
instructions with immediate offset, see Section 34–2.4.2. The difference is that these
instructions have only unprivileged access even when used in privileged software.
When used in unprivileged software, these instructions behave in exactly the same way
as normal memory access instructions with immediate offset.
2.4.4.3 Restrictions
In these instructions:
• Rn must not be PC
• Rt must not be SP and must not be PC.
2.4.4.4 Condition flags
These instructions do not change the flags.
UM10360_1
User manual
Rev. 01 — 4 January 2010
© NXP B.V. 2010. All rights reserved.
664 of 835