UM10360 Datasheet, PDF (426/835 Pages) NXP Semiconductors – LPC17xx User manual

NXP Semiconductors
UM10360
Chapter 19: LPC17xx I2C0/1/2 interface
• I²C0 is a standard I²C compliant bus interface with open-drain pins. This interface
supports functions described in the I²C specification for speeds up to 1 MHz. This
includes multi-master operation and allows powering off this device in a working
system while leaving the I²C-bus functional.
• I²C1 and I²C2 use standard I/O pins and are intended for use with a single-master
I²C-bus and do not support powering off of this device while leaving the I²C-bus
functional, and do not support multi-master I²C implementations.
3. Applications
Interfaces to external I²C standard parts, such as serial RAMs, LCDs, tone generators,
other microcontrollers, etc.
4. Description
A typical I²C-bus configuration is shown in Figure 19–83. Depending on the state of the
direction bit (R/W), two types of data transfers are possible on the I²C-bus:
• Data transfer from a master transmitter to a slave receiver. The first byte transmitted
by the master is the slave address. Next follows a number of data bytes. The slave
returns an acknowledge bit after each received byte, unless the slave device is unable
to accept more data.
• Data transfer from a slave transmitter to a master receiver. The first byte (the slave
address) is transmitted by the master. The slave then returns an acknowledge bit.
Next follows the data bytes transmitted by the slave to the master. The master returns
an acknowledge bit after all received bytes other than the last byte. At the end of the
last received byte, a “not acknowledge” is returned. The master device generates all
of the serial clock pulses and the START and STOP conditions. A transfer is ended
with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the I²C-bus will not be
released.
The LPC17xx I²C interfaces are byte oriented and have four operating modes: master
transmitter mode, master receiver mode, slave transmitter mode and slave receiver
mode.
I²C0 complies with the entire I²C specification, supporting the ability to have the LPC17xx
powered off and not interfere with other powered devices on the same I²C-bus. I²C1 and
I²C2 do not support the ability to have the power to the LPC17xx turned off without
interfering with other powered devices on the same I²C-bus.
Since I²C1 and I²C2 use standard port pins, internal pull-ups could (in theory) be enabled
in order to pull I²C-bus signals high when they are not driven low. However, these internal
pull-ups are far weaker than what would normally be used for I²C, so this practice is not
recommended. Refer to the “I²C-bus specification and user manual” for information on
proper pull-up values for a specific case.
UM10360_1
User manual
Rev. 01 — 4 January 2010
© NXP B.V. 2010. All rights reserved.
426 of 835