UM10360 Datasheet, PDF (245/835 Pages) NXP Semiconductors – LPC17xx User manual

NXP Semiconductors
UM10360
Chapter 11: LPC17xx USB device controller
• In case no SOF was received by the device at the beginning of a frame, the frame
number returned is that of the last successfully received SOF.
• In case the SOF frame number contained a CRC error, the frame number returned will
be the corrupted frame number as received by the device.
12.5 Read Test Register (Command: 0xFD, Data: read 2 bytes)
The test register is 16 bits wide. It returns the value of 0xA50F if the USB clocks (usbclk
and AHB slave clock) are running.
12.6 Set Device Status (Command: 0xFE, Data: write 1 byte)
The Set Device Status command sets bits in the Device Status Register.
Table 244. Set Device Status command bit description
Bit Symbol Value Description
Reset value
0
CON
The Connect bit indicates the current connect status of the device. It controls the 0
CONNECT output pin, used for SoftConnect. Reading the connect bit returns the
current connect status. This bit is cleared by hardware when the V_BUS status
input is LOW for more than 3 ms. The 3 ms delay filters out temporary dips in the
V_BUS voltage.
0
Writing a 0 will make the CONNECT pin go HIGH.
1
Writing a 1 will make the CONNECT pin go LOW.
1
CON_CH
Connect Change.
0
0
This bit is cleared when read.
1
This bit is set when the device’s pull-up resistor is disconnected because V_BUS
disappeared. The DEV_STAT interrupt is generated when this bit is 1.
2
SUS
Suspend: The Suspend bit represents the current suspend state.
0
When the device is suspended (SUS = 1) and the CPU writes a 0 into it, the
device will generate a remote wake-up. This will only happen when the device is
connected (CON = 1). When the device is not connected or not suspended,
writing a 0 has no effect. Writing a 1 to this bit has no effect.
0
This bit is reset to 0 on any activity.
1
This bit is set to 1 when the device hasn’t seen any activity on its upstream port
for more than 3 ms.
3
SUS_CH
Suspend (SUS) bit change indicator. The SUS bit can toggle because:
0
• The device goes into the suspended state.
• The device is disconnected.
• The device receives resume signalling on its upstream port.
This bit is cleared when read.
0
SUS bit not changed.
1
SUS bit changed. At the same time a DEV_STAT interrupt is generated.
UM10360_1
User manual
Rev. 01 — 4 January 2010
© NXP B.V. 2010. All rights reserved.
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