UM10360 Datasheet, PDF (579/835 Pages) NXP Semiconductors – LPC17xx User manual

UM10360
Chapter 30: LPC17xx Digital-to-Analog Converter (DAC)
Rev. 01 — 4 January 2010
User manual
1. Basic configuration
The DAC is configured using the following registers:
1. Power: The DAC is always connected to V_DDA. Register access is determined by
PINSEL and PINMODE settings (see below).
2. Clock: In the PCLKSEL0 register (Table 4–40), select PCLK_DAC.
3. Pins: Enable the DAC pin through the PINSEL registers. Select pin mode for port pin
with DAC through the PINMODE registers (Section 8–5). This must be done before
accessing any DAC registers.
4. DMA: The DAC can be connected to the GPDMA controller (see Section 30–4.2). For
GPDMA connections, see Table 31–544.
2. Features
• 10-bit digital to analog converter
• Resistor string architecture
• Buffered output
• Power-down mode
• Selectable speed vs. power
• Maximum update rate of 1 MHz.
3. Pin description
Table 30–538 gives a brief summary of each of DAC related pins.
Table 538. D/A Pin Description
Pin
Type
Description
AOUT
V_REFP, V_REFN
Output
Reference
Analog Output. After the selected settling time after the DACR is written with a new value,
the voltage on this pin (with respect to V_SSA) is VALUE × ((V_REFP - V_REFN)/1024) + V_REFN.
Voltage References. These pins provide a voltage reference level for the ADC and DAC.
Note: V_REFP should be tied to VDD(3V3) and V_REFN should be tied to V_SS if the ADC and
DAC are not used.
V_DDA, V_SSA
Power
Analog Power and Ground. These should typically be the same voltages as V_DD and V_SS,
but should be isolated to minimize noise and error. Note: V_DDA should be tied to VDD(3V3)
and V_SSA should be tied to V_SS if the ADC and DAC are not used.
UM10360_1
User manual
Rev. 01 — 4 January 2010
© NXP B.V. 2010. All rights reserved.
579 of 835