UM10360 Datasheet, PDF (112/835 Pages) NXP Semiconductors – LPC17xx User manual

NXP Semiconductors
UM10360
Chapter 8: LPC17xx Pin connect block
Table 89. Pin Mode select register 3 (PINMODE3 - address 0x4002 C04C) bit description
PINMODE3 Symbol
Description
Reset
value
15:14
P1.23MODE
Port 1 pin 23 control, see P0.00MODE.
00
17:16
P1.24MODE
Port 1 pin 24 control, see P0.00MODE.
00
19:18
P1.25MODE
Port 1 pin 25 control, see P0.00MODE.
00
21:20
P1.26MODE
Port 1 pin 26 control, see P0.00MODE.
00
23:22
P1.27MODE^[1] Port 1 pin 27 control, see P0.00MODE.
00
25:24
P1.28MODE
Port 1 pin 28 control, see P0.00MODE.
00
27:26
P1.29MODE
Port 1 pin 29 control, see P0.00MODE.
00
29:28
P1.30MODE
Port 1 pin 30 control, see P0.00MODE.
00
31:30
P1.31MODE
Port 1 pin 31 control, see P0.00MODE.
00
[1] Not available on 80-pin package.
5.13 Pin Mode select register 4 (PINMODE4 - 0x4002 C050)
This register controls pull-up/pull-down resistor configuration for Port 2 pins 0 to 15. For
details see Section 8–4 “Pin mode select register values”.
Table 90. Pin Mode select register 4 (PINMODE4 - address 0x4002 C050) bit description
PINMODE4 Symbol
Description
Reset
value
1:0
P2.00MODE
Port 2 pin 0 control, see P0.00MODE.
00
3:2
P2.01MODE
Port 2 pin 1 control, see P0.00MODE.
00
5:4
P2.02MODE
Port 2 pin 2 control, see P0.00MODE.
00
7:6
P2.03MODE
Port 2 pin 3 control, see P0.00MODE.
00
9:8
P2.04MODE
Port 2 pin 4 control, see P0.00MODE.
00
11:10
P2.05MODE
Port 2 pin 5 control, see P0.00MODE.
00
13:12
P2.06MODE
Port 2 pin 6 control, see P0.00MODE.
00
15:14
P2.07MODE
Port 2 pin 7 control, see P0.00MODE.
00
17:16
P2.08MODE
Port 2 pin 8 control, see P0.00MODE.
00
19:18
P2.09MODE
Port 2 pin 9 control, see P0.00MODE.
00
21:20
P2.10MODE
Port 2 pin 10 control, see P0.00MODE.
00
23:22
P2.11MODE^[1]
Port 2 pin 11 control, see P0.00MODE.
00
25:24
P2.12MODE^[1]
Port 2 pin 12 control, see P0.00MODE.
00
27:26
P2.13MODE^[1]
Port 2 pin 13 control, see P0.00MODE.
00
31:28
-
Reserved.
NA
[1] Not available on 80-pin package.
UM10360_1
User manual
Rev. 01 — 4 January 2010
© NXP B.V. 2010. All rights reserved.
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