UM10360 Datasheet, PDF (547/835 Pages) NXP Semiconductors – LPC17xx User manual

NXP Semiconductors
UM10360
Chapter 26: LPC17xx Quadrature Encoder Interface (QEI)
6.2 Control registers
6.2.1 QEI Control register (QEICON - 0x400B C000)
This register contains bits which control the operation of the position and velocity counters
of the QEI module.
Table 485: QEI Control register (QEICON - address 0x400B C000) bit description
Bit Symbol Description
Reset
value
0
RESP
Reset position counter. When set = 1, resets the position counter to all zeros. Autoclears when 0
the position counter is cleared.
1
RESPI
Reset position counter on index. When set = 1, resets the position counter to all zeros when an 0
index pulse occurs. Autoclears when the position counter is cleared.
2
RESV
Reset velocity. When set = 1, resets the velocity counter to all zeros and reloads the velocity 0
timer. Autoclears when the velocity counter is cleared.
3
RESI
Reset index counter. When set = 1, resets the index counter to all zeros. Autoclears when the 0
index counter is cleared.
31:4 -
reserved
0
6.2.2 QEI Configuration register (QEICONF - 0x400B C008)
This register contains the configuration of the QEI module.
Table 486: QEI Configuration register (QEICONF - address 0x400B C008) bit description
Bit Symbol Description
Reset
value
0
DIRINV Direction invert. When = 1, complements the DIR bit.
0
1
SIGMODE Signal Mode. When = 0, PhA and PhB function as quadrature encoder inputs. When = 1, PhA 0
functions as the direction signal and PhB functions as the clock signal.
2
CAPMODE Capture Mode. When = 0, only PhA edges are counted (2X). When = 1, BOTH PhA and PhB 0
edges are counted (4X), increasing resolution but decreasing range.
3
INVINX Invert Index. When set, inverts the sense of the index input.
0
31:4 -
reserved
0
6.2.3 QEI Status register (QEISTAT - 0x400B C004)
This register provides the status of the encoder interface.
Table 487: QEI Interrupt Status register (QEISTAT - address 0x400B C004) bit description
Bit Symbol Description
0
DIR
31:1 -
Direction bit. In combination with DIRINV bit indicates forward or reverse direction. See
Table 26–482.
reserved
Reset
value
0
UM10360_1
User manual
Rev. 01 — 4 January 2010
© NXP B.V. 2010. All rights reserved.
547 of 835