MC68HC908JL3E Datasheet, PDF (83/226 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
Reset and System Initialization
7.4.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 2OSCOUT
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles (Figure 7-5).
An internal reset can be caused by an illegal address, illegal opcode,
COP time-out, or POR. (See Figure 7-6 . Sources of Internal Reset.)
Note that for POR resets, the SIM cycles through 4096 2OSCOUT
cycles during which the SIM forces the RST pin low. The internal reset
signal then follows the sequence from the falling edge of RST shown in
Figure 7-5.
IRST
RST
2OSCOUT
IAB
RST PULLED LOW BY MCU
32 CYCLES
32 CYCLES
Figure 7-5. Internal Reset Timing
VECTOR HIGH
The COP reset is asynchronous to the bus clock.
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
COPRST
POR
LVI
INTERNAL RESET
Figure 7-6. Sources of Internal Reset
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
MOTOROLA
System Integration Module (SIM)
Technical Data
83