MC68HC908JL3E Datasheet, PDF (50/226 Pages) Motorola, Inc – Microcontrollers

FLASH Memory (FLASH)
4.8 FLASH Protection
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH Block
Protect Register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
4.9 FLASH Block Protect Register
The FLASH Block Protect Register is implemented as an 8-bit I/O
register. The value in this register determines the starting address of the
protected range within the FLASH memory.
Address: $FE09
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset: 0
0
0
0
0
0
0
Figure 4-4. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
0
BPR[7:0] — FLASH Block Protect Register Bit 7 to Bit 0
BPR[7:1] represent bits [12:6] of a 16-bit memory address. Bits
[15:13] are logic 1’s and bits [5:0] are logic 0’s.
16-bit memory address
Start address of FLASH block protect 1 1 1
000000
BPR[7:1]
BPR0 is used only for BPR[7:0] = $FF, for no block protection.
Technical Data
50
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
FLASH Memory (FLASH)
MOTOROLA