MC68HC908JL3E Datasheet, PDF (72/226 Pages) Motorola, Inc – Microcontrollers

Central Processor Unit (CPU)
Table 6-1. Instruction Set Summary
Source
Form
Operation
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
ROR opr,SP
RSP
Rotate Right through Carry
Reset Stack Pointer
RTI
Return from Interrupt
RTS
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
SBC opr,SP
SBC opr,SP
SEC
SEI
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STA opr,SP
STA opr,SP
STHX opr
STOP
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
STX opr,SP
STX opr,SP
Return from Subroutine
Subtract with Carry
Set Carry Bit
Set Interrupt Mask
Store A in M
Store H:X in M
Enable IRQ Pin; Stop Oscillator
Store X in M
Description
C
b7
b0
SP ← $FF
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← SP + 1; Pull (PCH)
SP ← SP + 1; Pull (PCL)
A ← (A) – (M) – (C)
C←1
I←1
M ← (A)
(M:M + 1) ← (H:X)
I ← 0; Stop Oscillator
M ← (X)
Effect on
CCR
VH I NZC
DIR
INH
↕
– –↕
↕
↕
INH
IX1
IX
SP1
– – – – – – INH
↕ ↕ ↕ ↕ ↕ ↕ INH
– – – – – – INH
IMM
DIR
EXT
↕
– –↕
↕
↕
IX2
IX1
IX
SP1
SP2
– – – – – 1 INH
– – 1 – – – INH
DIR
EXT
IX2
0 – – ↕ ↕ – IX1
IX
SP1
SP2
0 – – ↕ ↕ – DIR
– – 0 – – – INH
DIR
EXT
IX2
0 – – ↕ ↕ – IX1
IX
SP1
SP2
36 dd 4
46
1
56
1
66 ff
4
76
3
9E66 ff
5
9C
1
80
7
81
4
A2 ii
2
B2 dd 3
C2 hh ll 4
D2 ee ff 4
E2 ff
3
F2
2
9EE2 ff
4
9ED2 ee ff 5
99
1
9B
2
B7 dd 3
C7 hh ll 4
D7 ee ff 4
E7 ff
3
F7
2
9EE7 ff
4
9ED7 ee ff 5
35 dd 4
8E
1
BF dd 3
CF hh ll 4
DF ee ff 4
EF ff
3
FF
2
9EEF ff
4
9EDF ee ff 5
Technical Data
72
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
Central Processor Unit (CPU)
MOTOROLA