MC68HC908JL3E Datasheet, PDF (44/226 Pages) Motorola, Inc – Microcontrollers

FLASH Memory (FLASH)
Addr.
$FE08
$FE09
Register Name
Read:
FLASH Control Register
(FLCR)
Write:
Reset:
FLASH Block Protect ^Read:
Register Write:
(FLBPR) _Reset:
Bit 7
0
0
BPR7
0
6
5
0
0
0
0
BPR6 BPR5
0
0
= Unimplemented
4
0
0
BPR4
0
3
HVEN
0
BPR3
0
2
1
Bit 0
MASS ERASE PGM
0
0
0
BPR2 BPR1 BPR0
0
0
0
Figure 4-1. FLASH I/O Register Summary
4.3 Functional Description
The FLASH memory consists of an array of 4,096 or 1,536 bytes with an
additional 48 bytes for user vectors. The minimum size of FLASH
memory that can be erased is 64 bytes (a page); and the maximum size
of FLASH memory that can be programmed in a program cycle is 32
bytes (a row). Program and erase operations are facilitated through
control bits in the Flash Control Register (FLCR). Details for these
operations appear later in this section. The address ranges for the user
memory and vectors are:
• $EC00–$FBFF; user memory; 4,096 bytes;
MC68H(R)C908JL3E/JK3E
$F600–$FBFF; user memory; 1,536 bytes;
MC68H(R)C908JK1E
• $FFD0–$FFFF; user interrupt vectors; 48 bytes
NOTE: An erased bit reads as logic 1 and a programmed bit reads as logic 0.
A security feature prevents viewing of the FLASH contents.¹
Technical Data
44
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
FLASH Memory (FLASH)
MOTOROLA