MC68HC908JL3E Datasheet, PDF (162/226 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
12.5.1 Port D Data Register (PTD)
The port D data register contains a data latch for each of the eight port D
pins.
Address: $0003
Bit 7
6
5
4
3
2
Read:
PTD7
Write:
PTD6
PTD5
PTD4
PTD3
PTD2
Reset:
Unaffected by reset
Additional Functions
LED
(Sink)
LED
(Sink)
LED
(Sink)
LED
(Sink)
ADC8 ADC9
TCH1 TCH0
25mA sink 25mA sink
(Slow Edge) (Slow Edge)
5k pull-up 5k pull-up
Figure 12-9. Port D Data Register (PTD)
1
PTD1
ADC10
Bit 0
PTD0
ADC11
PTD[7:0] — Port D Data Bits
These read/write bits are software programmable. Data direction of
each port D pin is under the control of the corresponding bit in data
direction register D. Reset has no effect on port D data.
ADC[11:8] — ADC channels 11 to 8
ADC[11:8] are pins used for the input channels to the analog-to-digital
converter module. The channel select bits, ADCH[4:0], in the ADC
status and control register define which port pin will be used as an
ADC input and overrides any control from the port I/O logic. See
Section 11. Analog-to-Digital Converter (ADC).
TCH[1:0] — Timer Channel I/O
The TCH1 and TCH0 pins are the TIM input capture/output compare
pins. The edge/level select bits, ELSxB:ELSxA, determine whether
the PTD4/TCH0 and PTD5/TCH1 pins are timer channel I/O pins or
general-purpose I/O pins. See Section 10. Timer Interface Module
(TIM).
Technical Data
162
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
Input/Output (I/O) Ports
MOTOROLA