MC68HC908JL3E Datasheet, PDF (182/226 Pages) Motorola, Inc – Microcontrollers

Computer Operating Properly (COP)
15.4.5 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
15.4.6 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG). (See Section 5. Configuration
Register (CONFIG).)
15.4.7 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register 1.
Address: $001F
Bit 7
6
5
4
3
2
1
Read:
COPRS
R
Write:
R
LVID
R
SSREC STOP
Reset: 0
0
0
0
0
0
0
R = Reserved
Figure 15-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS.
1 = COP timeout period is (2¹³ – 2⁴) × 2OSCOUT cycles
0 = COP timeout period is (2¹⁸ – 2⁴) × 2OSCOUT cycles
COPD — COP Disable Bit
COPD disables the COP module.
1 = COP module disabled
0 = COP module enabled
Technical Data
182
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
Computer Operating Properly (COP)
MOTOROLA