MC68HC908JL3E Datasheet, PDF (153/226 Pages) Motorola, Inc – Microcontrollers

Technical Data – MC68H(R)C908JL3E/JK3E/JK1E
Section 12. Input/Output (I/O) Ports
12.1 Contents
12.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
12.3 Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
12.3.1 Port A Data Register (PTA) . . . . . . . . . . . . . . . . . . . . . . . . 156
12.3.2 Data Direction Register A (DDRA) . . . . . . . . . . . . . . . . . . . 157
12.3.3 Port A Input Pull-up Enable Register (PTAPUE) . . . . . . . . 158
12.4 Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
12.4.1 Port B Data Register (PTB) . . . . . . . . . . . . . . . . . . . . . . . . 159
12.4.2 Data Direction Register B (DDRB) . . . . . . . . . . . . . . . . . . . 160
12.5 Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
12.5.1 Port D Data Register (PTD) . . . . . . . . . . . . . . . . . . . . . . . . 162
12.5.2 Data Direction Register D (DDRD). . . . . . . . . . . . . . . . . . . 163
12.5.3 Port D Control Register (PDCR). . . . . . . . . . . . . . . . . . . . . 164
12.2 Introduction
Twenty three (23) bidirectional input-output (I/O) pins form three parallel
ports. All I/O pins are programmable as inputs or outputs.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
MOTOROLA
Input/Output (I/O) Ports
Technical Data
153