MC68HC908JL3E Datasheet, PDF (145/226 Pages) Motorola, Inc – Microcontrollers

INTERNAL
DATA BUS
READ DDRB/DDRD
WRITE DDRB/DDRD
WRITE PTB/PTD
RESET
READ PTB/PTD
DDRBx/DDRDx
PTBx/PTDx
Analog-to-Digital Converter (ADC)
Functional Description
DISABLE
ADCx
ADC DATA REGISTER
DISABLE
ADC CHANNEL x
CONVERSION
INTERRUPT COMPLETE
LOGIC
AIEN COCO
BUS CLOCK
ADC
ADC VOLTAGE IN
ADCVIN
CHANNEL
SELECT
(1 OF 12 CHANNELS)
ADC CLOCK
CLOCK
GENERATOR
ADCH[4:0]
ADIV[2:0] ADICLK
Figure 11-2. ADC Block Diagram
11.4.1 ADC Port I/O Pins
PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are
shared with the ADC channels. The channel select bits (ADC status and
control register, $003C), define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
MOTOROLA
Analog-to-Digital Converter (ADC)
Technical Data
145