MC68HC908JL3E Datasheet, PDF (157/226 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
Port A
12.3.2 Data Direction Register A (DDRA)
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic one to a DDRA bit enables the output buffer
for the corresponding port A pin; a logic zero disables the output buffer.
Address:
Read:
Write:
Reset:
$0004
Bit 7
0
6
5
4
3
2
1
DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1
0
0
0
0
0
0
0
Figure 12-3. Data Direction Register A (DDRA)
Bit 0
DDRA0
0
DDRA[6:0] — Data Direction Register A Bits
These read/write bits control port A data direction. Reset clears
DDRA[6:0], configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
NOTE: Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 12-4 shows the port A I/O logic.
READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
WRITE PTA ($0000)
DDRAx
PTAx
PTAPUEx
30k
PTAx
READ PTA ($0000)
To Keyboard Interrupt Circuit
Figure 12-4. Port A I/O Circuit
MC68H(R)C908JL3E/JK3E/JK1E — Rev. 2.0
MOTOROLA
Input/Output (I/O) Ports
Technical Data
157