PIC18F2450 Datasheet, PDF (82/320 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2450/4450
EXAMPLE 6-3:
READ_BLOCK
MODIFY_WORD
ERASE_BLOCK
WRITING TO FLASH PROGRAM MEMORY
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
D'64’
COUNTER
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
; number of bytes in erase block
; point to buffer
; Load TBLPTR with the base
; address of the memory block
TBLRD*+
MOVF TABLAT, W
MOVWF POSTINC0
DECFSZ COUNTER
BRA
READ_BLOCK
; read into TABLAT, and inc
; get data
; store data
; done?
; repeat
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
DATA_ADDR_HIGH
FSR0H
DATA_ADDR_LOW
FSR0L
NEW_DATA_LOW
POSTINC0
NEW_DATA_HIGH
INDF0
; point to buffer
; update buffer word
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
BSF
BSF
BCF
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
EECON1, CFGS
EECON1, WREN
EECON1, FREE
INTCON, GIE
; load TBLPTR with the base
; address of the memory block
; access Flash program memory
; enable write to memory
; enable Row Erase operation
; disable interrupts
MOVLW 55h
Required
MOVWF EECON2
Sequence
MOVLW 0AAh
MOVWF EECON2
BSF
EECON1, WR
BSF
INTCON, GIE
TBLRD*-
MOVLW BUFFER_ADDR_HIGH
MOVWF FSR0H
MOVLW BUFFER_ADDR_LOW
MOVWF FSR0L
MOVLW D’4’
MOVWF COUNTER1
WRITE_BUFFER_BACK
MOVLW D’16’
MOVWF COUNTER
WRITE_BYTE_TO_HREGS
MOVF POSTINC0, W
MOVWF TABLAT
TBLWT+*
DECFSZ COUNTER
BRA
WRITE_WORD_TO_HREGS
; write 55h
; write 0AAh
; start erase (CPU stall)
; re-enable interrupts
; dummy read decrement
; point to buffer
; number of bytes in holding register
; get low byte of buffer data
; present data to table latch
; write data, perform a short write
; to internal TBLWT holding register.
; loop until buffers are full
DS39760A-page 80
Advance Information
© 2006 Microchip Technology Inc.